Epson S1C33210 Bedienungsanleitung PDF herunterladen (Seite 251)

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III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERS

S1C33210 FUNCTION PART EPSON B-III-3-3

8-bit programmable timer 2

• Clock supply to the Ch.0 serial interface

When using the Ch.0 serial interface in the clock-synchronized master mode or the internal clock-based

asynchronous mode, the output clock derived from the underflow signal of the 8-bit programmable timer 2

by dividing it by 2 is supplied to the serial interface as its operating clock. This enables the transfer rate of

the serial interface to be programmed.

To use this function, write "0" to the serial interface control bit SSCK0 (D2) / Serial I/F Ch.0 control

8-bit programmable timer 3

• Clock supply to the Ch.1 serial interface

The output clock derived from the underflow signal of the 8-bit programmable timer 3 by dividing it by 2

is supplied to the serial interface as its operating clock. This enables the transfer rate of the serial interface

to be programmed.

Always write "0" to to the serial interface control bit SSCK1 (D2) / Serial I/F Ch.1 control register

(0x401E8) to select the internal clock.

8-bit programmable timer 4

• Clock supply to the Ch.2 serial interface

When using the Ch.2 serial interface in the clock-synchronized master mode or the internal clock-based

asynchronous mode, the output clock derived from the underflow signal of the 8-bit programmable timer 4

by dividing it by 2 is supplied to the serial interface as its operating clock. This enables the transfer rate of

the serial interface to be programmed.

To use this function, write "0" to the serial interface control bit SSCK2 (D2) / Serial I/F Ch.2 control

8-bit programmable timer 5

• Clock supply to the Ch.3 serial interface

The output clock derived from the underflow signal of the 8-bit programmable timer 5 by dividing it by 2

is supplied to the serial interface as its operating clock. This enables the transfer rate of the serial interface

to be programmed.

Always write "0" to the serial interface control bit SSCK3 (D2) / Serial I/F Ch.3 control register (0x401F8)

to select the internal clock.

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