Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Bedienungsanleitung PDF herunterladen (Seite 116)

7 DETAILS OF INSTRUCTIONS

108

EPSON

S1C33 FAMILY C33 PE CORE MANUAL

ld.h [%rb]+, %rs

Function

Signed halfword data transfer

Standard) H[

rb] ← rs(15:0), rb ← rb + 2

Extension 1) Unusable

Extension 2) Unusable

Code

15 12 11 8 7 4 3 0

0 0 1 1 1 0 0 1

r b r s

0x39__

Flag

IE C V Z N

– – – – –

Mode

Src: Register direct %rs = %r0 to %r15

Dst: Register indirect with post-increment

%rb = %r0 to %r15

CLK

Two cycles

Description

The 16 low-order bits of the rs register are transferred to the specified memory location. The rb

Caution

The rb register and the displacement must specify a halfword boundary address (least significant bit

= 0). Specifying an odd address causes an address misaligned exception.

1 2 ... 111 112 113 114 115 116 117 118 119 120 121 ... 180 181

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Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Bedienungsanleitung Seite 116