CMOS 32-BIT SINGLE CHIP MICROCOMPUTERCore ManualS1C33 Family C33 PE
1 SUMMARY2 EPSON S1C33 FAMILY C33 PE CORE MANUAL1.2 Summary of Added/Changed Functions of the C33 PEThe functions below have been added to or chang
7 DETAILS OF INSTRUCTIONS92 EPSON S1C33 FAMILY C33 PE CORE MANUALjrult sign8 / jrult.d sign8Function Conditional PC relative jump (for judgment o
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 93ld.b %rd, %rsFunction Signed byte data transfer Standard) rd(7:0) ← rs(7:0), rd
7 DETAILS OF INSTRUCTIONS94 EPSON S1C33 FAMILY C33 PE CORE MANUALld.b %rd, [%rb]Function Signed byte data transfer Standard) rd(7:0) ← B[rb], rd
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 95ld.b %rd, [%rb]+Function Signed byte data transfer Standard) rd(7:0) ← B[rb], r
7 DETAILS OF INSTRUCTIONS96 EPSON S1C33 FAMILY C33 PE CORE MANUALld.b %rd, [%sp + imm6]Function Signed byte data transfer Standard) rd(7:0) ← B[
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 97ld.b [%rb], %rsFunction Signed byte data transfer Standard) B[rb] ← rs(7:0) Ex
7 DETAILS OF INSTRUCTIONS98 EPSON S1C33 FAMILY C33 PE CORE MANUALld.b [%rb]+, %rsFunction Signed byte data transfer Standard) B[rb] ← rs(7:0), r
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 99ld.b [%sp + imm6], %rsFunction Signed byte data transfer Standard) B[sp + imm6]
7 DETAILS OF INSTRUCTIONS100 EPSON S1C33 FAMILY C33 PE CORE MANUALld.c %rd, imm4Function Transfer data from the coprocessor Standard) rd(7:0) ←
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 101ld.c imm4, %rsFunction Transfer data to the coprocessor Standard) W[CA(imm4)]
1 SUMMARYS1C33 FAMILY C33 PE CORE MANUAL EPSON 31.2.2 RegistersThe general-purpose registers (R0 to R15) are basically the same as in the C33 STD C
7 DETAILS OF INSTRUCTIONS102 EPSON S1C33 FAMILY C33 PE CORE MANUALld.cfFunction Transfer C, V, Z, and N flags from the coprocessor Standard) PSR(
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 103ld.h %rd, %rsFunction Signed halfword data transfer Standard) rd(15:0) ← rs(15
7 DETAILS OF INSTRUCTIONS104 EPSON S1C33 FAMILY C33 PE CORE MANUALld.h %rd, [%rb]Function Signed halfword data transfer Standard) rd(15:0) ← H[r
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 105ld.h %rd, [%rb]+Function Signed halfword data transfer Standard) rd(15:0) ← H[
7 DETAILS OF INSTRUCTIONS106 EPSON S1C33 FAMILY C33 PE CORE MANUALld.h %rd, [%sp + imm6]Function Signed halfword data transfer Standard) rd(15:0
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 107ld.h [%rb], %rsFunction Signed halfword data transfer Standard) H[rb] ← rs(15:
7 DETAILS OF INSTRUCTIONS108 EPSON S1C33 FAMILY C33 PE CORE MANUALld.h [%rb]+, %rsFunction Signed halfword data transfer Standard) H[rb] ← rs(15
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 109ld.h [%sp + imm6], %rsFunction Signed halfword data transfer Standard) H[sp +
7 DETAILS OF INSTRUCTIONS110 EPSON S1C33 FAMILY C33 PE CORE MANUALld.ub %rd, %rsFunction Unsigned byte data transfer Standard) rd(7:0) ← rs(7:0)
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 111ld.ub %rd, [%rb]Function Unsigned byte data transfer Standard) rd(7:0) ← B[rb]
2 REGISTERS4 EPSON S1C33 FAMILY C33 PE CORE MANUAL2 RegistersThe C33 PE Core contains 16 general-purpose registers and 8 special registers. R15R14R
7 DETAILS OF INSTRUCTIONS112 EPSON S1C33 FAMILY C33 PE CORE MANUALld.ub %rd, [%rb]+Function Unsigned byte data transfer Standard) rd(7:0) ← B[rb
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 113ld.ub %rd, [%sp + imm6]Function Unsigned byte data transfer Standard) rd(7:0)
7 DETAILS OF INSTRUCTIONS114 EPSON S1C33 FAMILY C33 PE CORE MANUALld.uh %rd, %rsFunction Unsigned halfword data transfer Standard) rd(15:0) ← rs
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 115ld.uh %rd, [%rb]Function Unsigned halfword data transfer Standard) rd(15:0) ←
7 DETAILS OF INSTRUCTIONS116 EPSON S1C33 FAMILY C33 PE CORE MANUALld.uh %rd, [%rb]+Function Unsigned halfword data transfer Standard) rd(15:0) ←
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 117ld.uh %rd, [%sp + imm6]Function Unsigned halfword data transfer Standard) rd(1
7 DETAILS OF INSTRUCTIONS118 EPSON S1C33 FAMILY C33 PE CORE MANUALld.w %rd, %rsFunction Word data transfer Standard) rd ← rs Extension 1) Unus
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 119ld.w %rd, %ssFunction Word data transfer Standard) rd ← ss Extension 1) Unus
7 DETAILS OF INSTRUCTIONS120 EPSON S1C33 FAMILY C33 PE CORE MANUALld.w %rd, [%rb]Function Word data transfer Standard) rd ← W[rb] Extension 1)
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 121ld.w %rd, [%rb]+Function Word data transfer Standard) rd ← W[rb], rb ← rb + 4
2 REGISTERSS1C33 FAMILY C33 PE CORE MANUAL EPSON 52.3 Processor Status Register (PSR)SymbolPSRSize32 bitsInitial value0x00000000Register nameProces
7 DETAILS OF INSTRUCTIONS122 EPSON S1C33 FAMILY C33 PE CORE MANUALld.w %rd, [%sp + imm6]Function Word data transfer Standard) rd ← W[sp + imm6 ×
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 123ld.w %rd, sign6Function Word data transfer Standard) rd(5:0) ← sign6(5:0), rd(
7 DETAILS OF INSTRUCTIONS124 EPSON S1C33 FAMILY C33 PE CORE MANUALld.w %sd, %rsFunction Word data transfer Standard) sd ← rs Extension 1) Unusa
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 125ld.w [%rb], %rsFunction Word data transfer Standard) W[rb] ← rs Extension 1)
7 DETAILS OF INSTRUCTIONS126 EPSON S1C33 FAMILY C33 PE CORE MANUALld.w [%rb]+, %rsFunction Word data transfer Standard) W[rb] ← rs, rb ← rb + 4
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 127ld.w [%sp + imm6], %rsFunction Word data transfer Standard) W[sp + imm6 × 4] ←
7 DETAILS OF INSTRUCTIONS128 EPSON S1C33 FAMILY C33 PE CORE MANUALmlt.h %rd, %rsFunction Signed 16-bit × 16-bit multiplication Standard) alr ← r
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 129mlt.w %rd, %rsFunction Signed 32-bit × 32-bit multiplication Standard) {ahr, a
7 DETAILS OF INSTRUCTIONS130 EPSON S1C33 FAMILY C33 PE CORE MANUALmltu.h %rd, %rsFunction Unsigned 16-bit × 16-bit multiplication Standard) alr
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 131mltu.w %rd, %rsFunction Unsigned 32-bit × 32-bit multiplication Standard) {ahr
2 REGISTERS6 EPSON S1C33 FAMILY C33 PE CORE MANUAL The V flag is set under the following conditions:(1) When negative integers are added togeth
7 DETAILS OF INSTRUCTIONS132 EPSON S1C33 FAMILY C33 PE CORE MANUALnopFunction No operation Standard) No operation Extension 1) Unusable Extens
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 133not %rd, %rsFunction Logical negation Standard) rd ← !rs Extension 1) Unusab
7 DETAILS OF INSTRUCTIONS134 EPSON S1C33 FAMILY C33 PE CORE MANUALnot %rd, sign6Function Logical negation Standard) rd ← !sign6 Extension 1) r
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 135or %rd, %rsFunction Logical OR Standard) rd ← rd | rs Extension 1) rd ← rs |
7 DETAILS OF INSTRUCTIONS136 EPSON S1C33 FAMILY C33 PE CORE MANUALor %rd, sign6Function Logical OR Standard) rd ← rd | sign6 Extension 1) rd ←
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 137pop %rdFunction Pop Standard) rd ← W[sp], sp ← sp + 4 Extension 1) Unusable
7 DETAILS OF INSTRUCTIONS138 EPSON S1C33 FAMILY C33 PE CORE MANUALpopn %rdFunction Pop Standard) “rN ← W[sp], sp ← sp + 4” repeated for rN = r0
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 139pops %sdFunction Pop Standard) When sd = ahr: alr ← W[sp], sp ← sp + 4, ahr ←
7 DETAILS OF INSTRUCTIONS140 EPSON S1C33 FAMILY C33 PE CORE MANUALpsrclr imm5Function Clear PSR bit Standard) psr ← psr & !imm5 Extension 1
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 141psrset imm5Function Set PSR bit Standard) psr ← psr | imm5 Extension 1) Unus
2 REGISTERSS1C33 FAMILY C33 PE CORE MANUAL EPSON 72.4 Stack Pointer (SP)SymbolSPSize32 bitsInitial valueIndeterminateRegister nameStack PointerR/WR
7 DETAILS OF INSTRUCTIONS142 EPSON S1C33 FAMILY C33 PE CORE MANUALpush %rsFunction Push Standard) sp ← sp - 4, W[sp] ← rs Extension 1) Unusabl
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 143pushn %rsFunction Push Standard) “sp ← sp - 4, W[sp] ← rN” repeated for rN = r
7 DETAILS OF INSTRUCTIONS144 EPSON S1C33 FAMILY C33 PE CORE MANUALpushs %ssFunction Push Standard) When ss = ahr: sp ← sp - 4, W[sp] ← ahr, sp ←
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 145ret / ret.dFunction Return from subroutine Standard) pc ← W[sp], sp ← sp + 4
7 DETAILS OF INSTRUCTIONS146 EPSON S1C33 FAMILY C33 PE CORE MANUALretdFunction Return from a debug-exception handler routine Standard) r0 ← W[0x
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 147retiFunction Return from trap handler routine Standard) pc ← W[sp + 4], psr ←
7 DETAILS OF INSTRUCTIONS148 EPSON S1C33 FAMILY C33 PE CORE MANUALrl %rd, %rsFunction Rotate to the left Standard) Rotate the content of rd to t
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 149rl %rd, imm5Function Rotate to the left Standard) Rotate the content of rd to
7 DETAILS OF INSTRUCTIONS150 EPSON S1C33 FAMILY C33 PE CORE MANUALrr %rd, %rsFunction Rotate to the right Standard) Rotate the content of rd to
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 151rr %rd, imm5Function Rotate to the right Standard) Rotate the content of rd to
2 REGISTERS8 EPSON S1C33 FAMILY C33 PE CORE MANUAL2.4.3 SP Operation during Execution of Pop-Related InstructionsIn a pop-related instruction, firs
7 DETAILS OF INSTRUCTIONS152 EPSON S1C33 FAMILY C33 PE CORE MANUALsbc %rd, %rsFunction Subtraction with borrow Standard) rd ← rd - rs - C Exten
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 153sla %rd, %rsFunction Arithmetic shift to the left Standard) Shift the content
7 DETAILS OF INSTRUCTIONS154 EPSON S1C33 FAMILY C33 PE CORE MANUALsla %rd, imm5Function Arithmetic shift to the left Standard) Shift the content
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 155sll %rd, %rsFunction Logical shift to the left Standard) Shift the content of
7 DETAILS OF INSTRUCTIONS156 EPSON S1C33 FAMILY C33 PE CORE MANUALsll %rd, imm5Function Logical shift to the left Standard) Shift the content of
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 157slpFunction SLEEP Standard) Place the processor in SLEEP mode Extension 1) Un
7 DETAILS OF INSTRUCTIONS158 EPSON S1C33 FAMILY C33 PE CORE MANUALsra %rd, %rsFunction Arithmetic shift to the right Standard) Shift the content
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 159sra %rd, imm5Function Arithmetic shift to the right Standard) Shift the conten
7 DETAILS OF INSTRUCTIONS160 EPSON S1C33 FAMILY C33 PE CORE MANUALsrl %rd, %rsFunction Logical shift to the right Standard) Shift the content of
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 161srl %rd, imm5Function Logical shift to the right Standard) Shift the content o
2 REGISTERSS1C33 FAMILY C33 PE CORE MANUAL EPSON 92.4.5 SP Operation when an Interrupt or Exception OccursIf an interrupt or software exception res
7 DETAILS OF INSTRUCTIONS162 EPSON S1C33 FAMILY C33 PE CORE MANUALsub %rd, %rsFunction Subtraction Standard) rd ← rd - rs Extension 1) rd ← rs
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 163sub %rd, imm6Function Subtraction Standard) rd ← rd - imm6 Extension 1) rd ←
7 DETAILS OF INSTRUCTIONS164 EPSON S1C33 FAMILY C33 PE CORE MANUALsub %sp, imm10Function Subtraction Standard) sp ← sp - imm10 × 4 Extension 1)
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 165swap %rd, %rsFunction Swap Standard) rd(31:24) ← rs(7:0), rd(23:16) ← rs(15:8)
7 DETAILS OF INSTRUCTIONS166 EPSON S1C33 FAMILY C33 PE CORE MANUALswaph %rd, %rsFunction Swap Standard) rd(31:24) ← rs(23:16), rd(23:16) ← rs(31
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 167xor %rd, %rsFunction Exclusive OR Standard) rd ← rd ^ rs Extension 1) rd ← r
7 DETAILS OF INSTRUCTIONS168 EPSON S1C33 FAMILY C33 PE CORE MANUALxor %rd, sign6Function Exclusive OR Standard) rd ← rd ^ sign6 Extension 1) r
APPENDIX INSTRUCTION CODE LIST (IN ORDER OF CODES)S1C33 FAMILY C33 PE CORE MANUAL EPSON 169Appendix Instruction Code List (in Order of Codes)Class
APPENDIX INSTRUCTION CODE LIST (IN ORDER OF CODES)170 EPSON S1C33 FAMILY C33 PE CORE MANUALClass 1××××××××××××××××0000000000000000111111111111110000
APPENDIX INSTRUCTION CODE LIST (IN ORDER OF CODES)S1C33 FAMILY C33 PE CORE MANUAL EPSON 171Class 4 (1)××000001110000add %sp,imm10sub %sp,imm
2 REGISTERS10 EPSON S1C33 FAMILY C33 PE CORE MANUAL2.5 Trap Table Base Register (TTBR)SymbolTTBRSize32 bitsInitial value0x00C00000*Register nameTra
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http://www.epsondevice.comEPSON Electronic Devices WebsiteSEMICONDUCTOR OPERATIONS DIVISIONIssue July, 2006Printed in Japan ALCore ManualS1C33 Family
2 REGISTERSS1C33 FAMILY C33 PE CORE MANUAL EPSON 112.9 Register Notation and Register NumbersThe following describes the register notation and regi
NOTICENo part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson
2 REGISTERS12 EPSON S1C33 FAMILY C33 PE CORE MANUAL2.9.2 Special Registers%ss ss is a metasymbol indicating the special register that holds the so
3 DATA FORMATSS1C33 FAMILY C33 PE CORE MANUAL EPSON 133 Data FormatsThe C33 PE Core can handle data of 8, 16, and 32 bits in length. In this manual
3 DATA FORMATS14 EPSON S1C33 FAMILY C33 PE CORE MANUAL3.3 Unsigned 8-Bit Transfer (Memory → Register)Example: ld.ub %rd,[%rb][%rb]Byte7 0000000003
3 DATA FORMATSS1C33 FAMILY C33 PE CORE MANUAL EPSON 153.7 Signed 16-Bit Transfer (Register → Register)Example: ld.h %rd,%rsX%rs31 16 15 0SSSSSSSS3
3 DATA FORMATS16 EPSON S1C33 FAMILY C33 PE CORE MANUAL3.11 32-Bit Transfer (Register → Register)Example: ld.w %rd,%rs%rs31Word031Word0%rdFigure 3.
4 ADDRESS MAPS1C33 FAMILY C33 PE CORE MANUAL EPSON 174 Address MapThe C33 PE Core has a 4GB address space. Figure 4.1 shows the C33 PE Core address
5 INSTRUCTION SET18 EPSON S1C33 FAMILY C33 PE CORE MANUAL5 Instruction SetThe C33 PE Core instruction set consists of the function-extended instruc
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 19ClassificationData transferSystem controlImmediate extensionBit manipulationOtherFunctionGe
5 INSTRUCTION SET20 EPSON S1C33 FAMILY C33 PE CORE MANUAL5.2 Function Extended InstructionsTable 5.2.1 Function Extended InstructionsClassificatio
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 215.3 Instructions Added to the C33 PE CoreTable 5.3.1 Instructions Added to the C33 PE Cor
DevicesS1 C 33209 F 00E1Packing specifications00 : Besides tape & reel0A : TCP BL 2 directions0B : Tape & reel BACK0C : TCP BR 2 directions0D
5 INSTRUCTION SET22 EPSON S1C33 FAMILY C33 PE CORE MANUAL5.5 Addressing Modes (without ext extension)The instruction set of the C33 PE Core, as wit
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 23Actual special register names are written as follows: Processor status register %psr Stac
5 INSTRUCTION SET24 EPSON S1C33 FAMILY C33 PE CORE MANUAL5.5.5 Register Indirect Addressing with DisplacementIn this mode, memory is accessed
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 255.6 Addressing Modes with extThe immediate specifiable in 16-bit, fixed-length instru
5 INSTRUCTION SET26 EPSON S1C33 FAMILY C33 PE CORE MANUAL Extending to a 32-bit immediate To extend the immediate to 32-bit quantity, enter two ex
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 27Extending [%sp+imm6] displacement The immediate (imm6) in displacement-added register in
5 INSTRUCTION SET28 EPSON S1C33 FAMILY C33 PE CORE MANUALExtending register-to-register operation instructions Register-to-register operation inst
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 29Extending the displacement of PC relative branch instructions The sign8 immediate in PC
5 INSTRUCTION SET30 EPSON S1C33 FAMILY C33 PE CORE MANUAL5.6.3 Exception Handling for ext InstructionsFor exceptions associated with ext instru
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 315.7 Data Transfer InstructionsThe transfer instructions in the C33 PE Core support d
5 INSTRUCTION SET32 EPSON S1C33 FAMILY C33 PE CORE MANUAL5.8 Logical Operation InstructionsFour discrete logical operation instructions are availab
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 335.9 Arithmetic Operation InstructionsThe instruction set of the C33 PE Core supports a
5 INSTRUCTION SET34 EPSON S1C33 FAMILY C33 PE CORE MANUAL5.10 Multiply InstructionsThe instruction set of the C33 PE Core includes four multiplicat
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 355.11 Shift and Rotate InstructionsThe instruction set of the C33 PE Core supports instruct
5 INSTRUCTION SET36 EPSON S1C33 FAMILY C33 PE CORE MANUAL5.12 Bit Manipulation InstructionsThe following four instructions are provided for ma
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 375.13 Push and Pop InstructionsThe push and pop instructions are provided to temporarily sa
5 INSTRUCTION SET38 EPSON S1C33 FAMILY C33 PE CORE MANUAL31 0Before execution of popnlow address31 0After execution of popnr15r14r13r12::r1r0low add
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 395.14 Branch and Delayed Branch Instructions5.14.1 Types of Branch Instructions(1) PC rela
5 INSTRUCTION SET40 EPSON S1C33 FAMILY C33 PE CORE MANUAL When extended by two ext instructions ext imm13 ext imm13' jp sign8 Function
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 41(2) Absolute jump instructions The absolute jump instruction jp %rb causes the program to
CONTENTSS1C33 FAMILY C33 PE CORE MANUAL EPSON i– Contents –1 Summary ...
5 INSTRUCTION SET42 EPSON S1C33 FAMILY C33 PE CORE MANUAL5.14.2 Delayed Branch InstructionsThe C33 PE Core uses pipelined instruction processing, i
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 43 A delayed slot instruction is always executed regardless of whether the delaye
5 INSTRUCTION SET44 EPSON S1C33 FAMILY C33 PE CORE MANUAL5.15 System Control InstructionsThe following three instructions are used to control the s
5 INSTRUCTION SETS1C33 FAMILY C33 PE CORE MANUAL EPSON 455.16 Swap InstructionsThe swap instructions replace the contents of general-purpose regist
5 INSTRUCTION SET46 EPSON S1C33 FAMILY C33 PE CORE MANUAL5.17 Other InstructionsFlag control instructions The C33 PE Core has had new instruc
6 FUNCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 476 FunctionsThis chapter describes the processing status of the C33 PE Core and outlines the oper
6 FUNCTIONS48 EPSON S1C33 FAMILY C33 PE CORE MANUAL6.2 Program ExecutionFollowing initial reset, the processor loads the reset vector address
6 FUNCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 496.2.2 Execution Cycles and FlagsThe instructions in the C33 PE Core are processed in parallel at
6 FUNCTIONS50 EPSON S1C33 FAMILY C33 PE CORE MANUALClassificationData transferSystem controlImmediate extensionBit manipulationOtherld.bld.ubld.hld.
6 FUNCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 51Added instructionsTable 6.2.2.3 Number of Instruction Execution Cycles and Flag Status (Added In
CONTENTSii EPSON S1C33 FAMILY C33 PE CORE MANUAL5.5 Addressing Modes (without ext extension) ...
6 FUNCTIONS52 EPSON S1C33 FAMILY C33 PE CORE MANUAL6.3 Interrupts and ExceptionsWhen an external interrupt or exception occurs during progra
6 FUNCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 536.3.2 Vector TableVector table in the C33 PE Core The table below lists the exceptions and in
6 FUNCTIONS54 EPSON S1C33 FAMILY C33 PE CORE MANUAL6.3.3 Exception HandlingWhen an interrupt or exception occurs, the processor starts exception ha
6 FUNCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 556.3.6 NMIAn NMI is generated when the #NMI input on the processor is asserted low. When an NMI o
6 FUNCTIONS56 EPSON S1C33 FAMILY C33 PE CORE MANUAL6.3.9 Undefined Instruction ExceptionWhen an instruction, which does not exist in the C
6 FUNCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 576.4 Power-Down ModeThe C33 PE Core supports two power-down modes: HALT and SLEEP modes.HALT mode
6 FUNCTIONS58 EPSON S1C33 FAMILY C33 PE CORE MANUAL6.5 Debug CircuitThe C33 PE Core has a debug circuit to assist in software development by the us
6 FUNCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 596.6 Coprocessor InterfaceThe C33 PE Core incorporates a coprocessor interface. This interf
7 DETAILS OF INSTRUCTIONS60 EPSON S1C33 FAMILY C33 PE CORE MANUAL7 Details of InstructionsThis section explains all the instructions in alphabetica
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 61adc %rd, %rsFunction Addition with carry Standard) rd ← rd + rs + C Extension
CONTENTSS1C33 FAMILY C33 PE CORE MANUAL EPSON iii7 Details of Instructions ...
7 DETAILS OF INSTRUCTIONS62 EPSON S1C33 FAMILY C33 PE CORE MANUALadd %rd, %rsFunction Addition Standard) rd ← rd + rs Extension 1) rd ← rs + i
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 63add %rd, imm6Function Addition Standard) rd ← rd + imm6 Extension 1) rd ← rd
7 DETAILS OF INSTRUCTIONS64 EPSON S1C33 FAMILY C33 PE CORE MANUALadd %sp, imm10Function Addition Standard) sp ← sp + imm10 × 4 Extension 1) Un
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 65and %rd, %rsFunction Logical AND Standard) rd ← rd & rs Extension 1) rd ←
7 DETAILS OF INSTRUCTIONS66 EPSON S1C33 FAMILY C33 PE CORE MANUALand %rd, sign6Function Logical AND Standard) rd ← rd & sign6 Extension 1)
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 67bclr [%rb], imm3Function Bit clear Standard) B[rb](imm3) ← 0 Extension 1) B[r
7 DETAILS OF INSTRUCTIONS68 EPSON S1C33 FAMILY C33 PE CORE MANUALbnot [%rb], imm3Function Bit negation Standard) B[rb](imm3) ← !B[rb](imm3) Ext
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 69brkFunction Debugging exception Standard) W[0x60008] ← pc + 2, W[0x6000C] ← r0,
7 DETAILS OF INSTRUCTIONS70 EPSON S1C33 FAMILY C33 PE CORE MANUALbset [%rb], imm3Function Bit set Standard) B[rb](imm3) ← 1 Extension 1) B[rb
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 71btst [%rb], imm3Function Bit test Standard) Z flag ← 1 if B[rb](imm3) = 0 else
CONTENTSiv EPSON S1C33 FAMILY C33 PE CORE MANUALld.w %rd, %rs ...
7 DETAILS OF INSTRUCTIONS72 EPSON S1C33 FAMILY C33 PE CORE MANUALcall %rb / call.d %rbFunction Subroutine call Standard) sp ← sp - 4, W[sp] ← p
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 73call sign8 / call.d sign8Function Subroutine call Standard) sp ← sp - 4, W[sp]
7 DETAILS OF INSTRUCTIONS74 EPSON S1C33 FAMILY C33 PE CORE MANUALcmp %rd, %rsFunction Comparison Standard) rd - rs Extension 1) rs - imm13 Ex
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 75cmp %rd, sign6Function Comparison Standard) rd - sign6 Extension 1) rd - sign
7 DETAILS OF INSTRUCTIONS76 EPSON S1C33 FAMILY C33 PE CORE MANUALdo.c imm6Function Coprocessor execution Standard) W[CA(imm6)] Extension 1) Un
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 77ext imm13Function Immediate extension Standard) Extends the immediate data/oper
7 DETAILS OF INSTRUCTIONS78 EPSON S1C33 FAMILY C33 PE CORE MANUALhaltFunction HALT Standard) Sets the processor to HALT mode Extension 1) Unusa
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 79int imm2Function Software exception Standard) sp ← sp - 4, W[sp] ← pc + 2, sp ←
7 DETAILS OF INSTRUCTIONS80 EPSON S1C33 FAMILY C33 PE CORE MANUALjp %rb / jp.d %rbFunction Unconditional jump Standard) pc ← rb Extension 1)
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 81jp sign8 / jp.d sign8Function Unconditional PC relative jump Standard) pc ← pc
1 SUMMARYS1C33 FAMILY C33 PE CORE MANUAL EPSON 11 SummaryThe C33 PE is a RISC type processor in the S1C33 series of Seiko Epson 32-bit microcompute
7 DETAILS OF INSTRUCTIONS82 EPSON S1C33 FAMILY C33 PE CORE MANUALjpr %rb / jpr.d %rbFunction Unconditional PC relative jump Standard) pc ← pc +
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 83jreq sign8 / jreq.d sign8Function Conditional PC relative jump Standard) pc ←
7 DETAILS OF INSTRUCTIONS84 EPSON S1C33 FAMILY C33 PE CORE MANUALjrge sign8 / jrge.d sign8Function Conditional PC relative jump (for judgment of
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 85jrgt sign8 / jrgt.d sign8Function Conditional PC relative jump (for judgment of
7 DETAILS OF INSTRUCTIONS86 EPSON S1C33 FAMILY C33 PE CORE MANUALjrle sign8 / jrle.d sign8Function Conditional PC relative jump (for judgment of
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 87jrlt sign8 / jrlt.d sign8Function Conditional PC relative jump (for judgment of
7 DETAILS OF INSTRUCTIONS88 EPSON S1C33 FAMILY C33 PE CORE MANUALjrne sign8 / jrne.d sign8Function Conditional PC relative jump Standard) pc ←
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 89jruge sign8 / jruge.d sign8Function Conditional PC relative jump (for judgment o
7 DETAILS OF INSTRUCTIONS90 EPSON S1C33 FAMILY C33 PE CORE MANUALjrugt sign8 / jrugt.d sign8Function Conditional PC relative jump (for judgment o
7 DETAILS OF INSTRUCTIONSS1C33 FAMILY C33 PE CORE MANUAL EPSON 91jrule sign8 / jrule.d sign8Function Conditional PC relative jump (for judgment o
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