Epson SED1278F/D Spezifikationen

SED1278LCD Controller/DriversTechnical Manual

9–8 EPSONSED1278Set CGRAM AddressDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB001 ACR40H to 7FHRS = 0This instruction1. loads a new 6-bit address into the address co

EPSON 9–9SED1278SED1278Read Only InstructionsRead Busy Flag/Address CounterDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0BF ACCRS = 1Reading the instruction register

9–10 EPSONSED1278SPECIFICATIONSAbsolute Maximum RatingsNotes: 1. VDD > V1 > V2 > V3 > V4 > V5 > VSS2. A flat package product can bec

EPSON 9–11SED1278SED1278AC Characteristics• MPU write cycle timing (write to SED1278)R/WtAStWEHtAHtAHVIL1VIL1VIH1VIH1tcycEVIL1tDStDHtrEtFEVIL1VIH1RSED

9–12 EPSONSED1278• External segment driver signal timingLP0.9 VDD0.1 VDD0.1 VDD0.9 VDD0.1 VDD0.9 VDD0.9 VDD0.9 VDD0.1 VDD0.9 VDD0.1 VDDtWCLHtWCLHtWCLL

EPSON 9–13SED1278SED1278• Power-on reset timing0.1ms ≤ tr ≤ 10ms(Ta = –20 to 75 deg. C)toff ≥ 1mstr toff0.2V4.5VLCD Drive VoltagesMechanical Specifica

9–14 EPSONSED1278SED1278D Package DimensionsChip size: 4.50 mm × 3.67 mmChip thickness: 400 µmPad size: 109 µm × 109 µmPad pitch: 182 µm25YX24 141 644

EPSON 9–15SED1278SED1278PadX (µm) Y (µm)Number Name41 DB2 –2087 –167142 DB3 –1905 –167143 DB4 –1723 –167144 DB5 –1541 –167145 DB6 –1359 –167146 DB7 –1

9–16 EPSONSED1278OPERATIONThe Busy FlagThe SED1278 takes between 10 and 410 clock cycles toexecute instructions. During that period additionalinstruc

EPSON 9–17SED1278SED1278Software initializationInitialization during power-on reset involves severalunstable factors related to power-supply outputflu

– i –SED1278ContentsOVERVIEW ...

9–18 EPSONSED12780000001000DB7·RS R/W E·····DB0Display Clear[8][10][11][9][13]0000000001DB7 RS R/W E······DB0Entry Modeset[12]00000001I/D SDB7 RS R/W

EPSON 9–19SED1278SED1278• Software Initialization (4-bit MPU bus, fOSC = 250 kHz)[1]000011DB7 RS R/W E··DB430 ms or more4.1 ms or more100 µs or more40

9–20 EPSONSED1278[9][10][12]Display clear[11]00010000DB7··DB4BF=0(High-order)(Low-order)(High-order)(Low-order)(High-order)(Low-order)BF 0 1 1DB7 RS R

EPSON 9–21SED1278SED1278THE CHARACTER GENERATORCharacter Generator ROM (CGROM)The SED1278 contains a 240 character, masked CGROM.Each character is 5×1

9–22 EPSONSED12785×11 pixel font (1/11 duty cycle)The maximum character height is 11 pixels, however ifa cursor is used row 10 must be left blank.The

EPSON 9–23SED1278SED1278LCD INTERFACELCD Drive VoltagesThe SED1278 generates segment and common drivesignals using the voltages supplied to pins V1, V

9–24 EPSONSED1278LCD Drive Signal WaveformsThe segment and common drive waveforms generatedby the SED1278, for various duty cycle ratios, are shownin

EPSON 9–25SED1278SED1278FRtFRtFRVDDVSSVDDV1V4V5VDDV1V4V5VDDV1V4V5VDDV5, V3V5COM 1COM 2COM 16SEG 1...

9–26 EPSONSED1278• 1 line• 8 characters•5×10 pixels + cursor• 1/11 duty cycle• System set: N = 0, F = 1SED1278COM 118COM 10COM 11SEG 1SEG 40No. ofcha

EPSON 9–27SED1278SED1278• 1 line• 80 characters•5×7 pixels + cursor• 1/8 duty cycle• System set: N = 0, F = 0COM 1COM 7COM8SEG 1SEG40DOXSCLLPFRSEG 0

EPSON 9–1SED1278SED1278FEATURES• Interface for 4- and 8-bit MPUs• Display RAM – 80 bytes (80 characters)• Character generator ROM – 240 characters–5×8

9–28 EPSONSED1278• 2 line• 20 characters•5×7 pixels + cursor• 1/16 duty cycle• System set: N = 1, F = don’t careCOM1COM7COM8COM9COM16COM15SEG 1SEG40D

EPSON 9–29SED1278SED1278• 2 line• 40 characters•5×7 pixels + cursor• 16 duty cycle• System set: N = 1, F = don‘t careSED1278COM 1COM 7COM 8COM 9 COM1

9–30 EPSONSED1278MPU INTERFACEThe SED1278 has selectable 8- or 4-bit MPU interface.An example of a typical 8-bit MPU interface is shownfigure 8.Z80 SE

EPSON 9–31SED1278SED1278COMPARISON WITH HD44780 BY HITACHIItem HD44780 (Hitachi) SED1278Data display RAM 80 bytes ←Character generator ROM 192 types 2

9–32 EPSONSED1278APPENDIX A: CHARACTER CODES AND FONTSSED1278F0A/SED1278D0AHigher 4-bit (D4 to D7) of Character Code (Hexadecimal)Lower 4-bit (D0 to

EPSON 9–33SED1278SED1278SED1278F0B/SED1278D0BHigher 4-bit (D4 to D7) of Character Code (Hexadecimal)Lower 4-bit (D0 to D3) of Character Code (Hexadeci

9–34 EPSONSED1278SED1278F0C/SED1278D0CHigher 4-bit (D4 to D7) of Character Code (Hexadecimal)Lower 4-bit (D0 to D3) of Character Code (Hexadecimal)0CG

EPSON 9–35SED1278SED1278SED1278F0E/SED1278D0EHigher 4-bit (D4 to D7) of Character Code (Hexadecimal)Lower 4-bit (D0 to D3) of Character Code (Hexadeci

9–36 EPSONSED1278SED1278F0G/SED1278D0GHigher 4-bit (D4 to D7) of Character Code (Hexadecimal)Lower 4-bit (D0 to D3) of Character Code (Hexadecimal)0CG

EPSON 9–37SED1278SED1278SED1278F0H/SED1278D0HHigher 4-bit (D4 to D7) of Character Code (Hexadecimal)Lower 4-bit (D0 to D3) of Character Code (Hexadeci

9–2 EPSONSED1278BLOCK DIAGRAMDB 0toDB 7ER/WRSVSSVDCV1V2V3V4V5COM 1 toCOM 16SEG 1 toSEG 40XSCLLPFRDOOSC1 OSC2855577I/O BufferI/O ControlInstruction Dec

9–38 EPSONSED1278APPENDIX B: PIN CONSTRUCTIONInput Pin Type 1•E• OSC1VDDVSSInput Pin Type 2•RS• R/WVDDPinVSS

EPSON 9–39SED1278SED1278Output Pin• OSC2• XSCL, LP, FR, DOVDDVSSI/O Pin• DB0 to DB7VDDPinVSS

EPSON 9–3SED1278SED127825SED1278D24 141 64408065PINOUTPinNumber Name1 SEG222 SEG213 SEG204 SEG195 SEG186 SEG177 SEG168 SEG159 SEG1410 SEG1311 SEG1212

9–4 EPSONSED1278PIN DESCRIPTIONMPU InterfaceRS Register select signal input. Selectsbetween the data and instruction registersduring CPU access.RS =

EPSON 9–5SED1278SED1278TERMINAL CONFIGURATION1. Input terminal configuration (1)VDDInternalApplicable terminal· E· OSCIVSS2. Input terminal configurat

9–6 EPSONSED12784. Input/Output terminal configurationVDDApplicable terminal· DBO to DB7InternalVSSINSTRUCTION DESCRIPTIONInstruction Summary* Don’t

EPSON 9–7SED1278SED1278Write Only InstructionsClear DisplayDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB00000000101HRS = 0This instruction1. loads all locations in t