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S1C63466 TECHNICAL MANUAL EPSON 3
CHAPTER 1: OUTLINE
1.3 Pin Layout Diagram
QFP8-144pin QFP17-144pin
73108
37
72
INDEX
361
144
109
S1C63466
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
No.
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
No.
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
No.
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
Name
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM7
COM6
COM5
COM4
N.C.
COM3
COM2
COM1
COM0
BZ
V
SS
OSC1
OSC2
V
D1
OSC3
OSC4
V
DD
RESET
TEST
V
REF
N.C.
N.C.
Name
N.C.
N.C.
R23
R22
R21
R20
R13
R12
R11
R10
R03
R02
R01
R00
P23
P22
P21
P20
P13
P12
P11
P10
P03
P02
P01
P00
K13
K12
K11
K10
K03
K02
K01
K00
N.C.
N.C.
Name
N.C.
SVD
V
C1
V
C2
V
C3
V
C4
V
C5
CF
CE
CD
CC
CB
CA
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
SEG59
SEG58
SEG57
SEG56
SEG55
SEG54
SEG53
SEG52
SEG51
SEG50
SEG49
SEG48
N.C.
N.C.
Name
N.C.
SEG47
SEG46
SEG45
SEG44
SEG43
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
N.C.
N.C. : No Connection
Fig. 1.3.1 Pin layout diagram
Note: The pin layout diagram of the both package is same.
73108
37
72
INDEX
361
144
109
S1C63466
- S1C63466 1
- CONTENTS 7
- EPSON iii 9
- 1OUTLINE 11
- 1.2 Block Diagram 12
- 1.3 Pin Layout Diagram 13
- 1.4 Pin Description 15
- 1.5 Mask Option 16
- CHAPTER 1: OUTLINE 17
- 2.1 Power Supply 19
- 2.2 Initial Reset 21
- 2.3 Test Terminal (TEST) 23
- 3 CPU, ROM, RAM 24
- 3.4 Data ROM 25
- CHAPTER 4 26
- ERIPHERAL 26
- PERATION 26
- ∗2 Not set in the circuit 27
- EPSON 19 29
- EPSON 21 31
- 4.2 Watchdog Timer 32
- 4.2.4 Programming notes 33
- 4.3 Oscillation Circuit 34
- (sound quality) 35
- EPSON 27 37
- 4.3.7 Programming notes 38
- 4.4.2 Interrupt function 39
- 4.4.3 Mask option 40
- EPSON 31 41
- 4.4.5 Programming notes 43
- 4.5.2 Mask option 44
- 4.5.3 High impedance control 45
- 4.5.4 Special output 45
- •TOUT (R02) 46
- • FOUT (R03) 46
- EPSON 37 47
- 4.5.6 Programming notes 49
- 4.6.2 Mask option 51
- 4.6.6 I/O memory of I/O ports 53
- (2) I/O port control 55
- 4.6.7 Programming notes 56
- EPSON 47 57
- 4.7.3 Mask option 58
- EPSON 49 59
- 4.7.5 Display memory 61
- 4.7.6 LCD contrast adjustment 62
- EPSON 53 63
- 4.7.8 Programming notes 65
- 4.8 Clock Timer 66
- 4.8.3 Interrupt function 67
- EPSON 59 69
- 4.8.5 Programming notes 70
- 4.9 Stopwatch Timer 71
- 4.9.3 Interrupt function 72
- EPSON 63 73
- 4.9.5 Programming notes 74
- 4.10 Programmable Timer 75
- 4.10.3 Counter mode 77
- (1) Selection of source clock 78
- Timer 1 underflow 80
- Source clock for serial I/F 80
- EPSON 71 81
- EPSON 73 83
- EPSON 75 85
- 4.10.9 Programming notes 86
- EPSON 77 87
- 4.11.2 Mask option 88
- EPSON 79 89
- SD3 SD2 SD1 SD0 90
- SD4 SD5 SD6 SD7 90
- SD7 SD6 SD5 SD4 90
- SD0 SD1 SD2 SD3 90
- (5) Timing chart 91
- EPSON 83 93
- SS) level 94
- DD) level bit 94
- 4.11.6 Programming notes 95
- 4.12 Sound Generator 96
- 4.12.6 One-shot output 99
- *2 Not set in the circuit 100
- EPSON 91 101
- 4.12.8 Programming notes 102
- Data bus 103
- 4.13.5 Programming notes 105
- 4.14 Interrupt and HALT 106
- EPSON 97 107
- 4.14.1 Interrupt factor 108
- EPSON 99 109
- EPSON 101 111
- 4.14.5 Programming notes 112
- 5SUMMARY OF NOTES 113
- Memory and stack 114
- Watchdog timer 114
- Oscillation circuit 114
- Input port 115
- Output port 115
- I/O port 115
- LCD driver 115
- Clock timer 115
- Stopwatch timer 116
- Programmable timer 116
- Serial interface 116
- Sound generator 117
- SVD circuit 117
- Interrupt 117
- 7ELECTRICAL CHARACTERISTICS 119
- 7.3 DC Characteristics 120
- CR oscillation frequency f 124
- <Master mode> 125
- <Slave mode> 125
- 2.5 msec min 126
- 5 msec min 126
- CHAPTER 8PACKAGE 127
- QFP17-144pin 128
- QFP5-128pin 129
- QFP8-144pin 130
- CHAPTER 9PAD LAYOUT 133
- CHAPTER 9: PAD LAYOUT 134
- APPENDIX S5U1C63000P MANUAL 135
- OSC1 rough adjustment 136
- OSC1 fine adjustment 136
- OSC3 rough adjustment 136
- OSC3 fine adjustment 136
- (7) RESET switch 137
- (9) IOSEL2 137
- (10) CLK and PRG switch 137
- (11) VC5 137
- I/O connection cable 138
- To target board 138
- A.3 Usage Precautions 140
- (3) Functional precautions 141
- First issue July, 1998 144
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